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Section: New Software and Platforms
Lopht
Logical to Physical Time Compiler
Scientific Description Lopht is a system-level compiler for embedded systems. Its input is formed of three objects:
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A functional specification in a high-level synchronous language.
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A description of the implementation platform, defining the topology of the parallel execution platform, and the capacity of its elements.
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A set of non-functional requirements, provided under the form of annotations on both functional specification and platform description.
The algorithmic core of Lopht is formed of allocation and scheduling heuristics which rely on two fundamental choices: the use of table-based static scheduling and the use of low-complexity heuristics based on list scheduling. The output of Lopht is formed of all the C code and configuration information needed to allow real deployment on the physical target platform.
Functional Description Accepted input languages for functional specifications include Heptagon and Scade v4. Lopht uses as f ront-end a modified version of the Heptagon compiler developed at Inria. The use of this front-end also allows the use of legacy/business C code satisfying the Heptagon calling convention.
Regarding scheduling, the originality of Lopht resides in a strong focus on classical compiler optimizations e.g. software pipelining), on novel architectural targets (many-core chips and time-triggered embedded systems), and the possibility to handle multiple, complex non-functional requirements covering real-time (release dates a nd deadlines possibly larger than the period, end-to-end flow constraints), ARINC 653 partitioning, the possibility to preempt or not each task, and allocation.
The output of Lopht is formed of all the C code and configuration information needed to allow compilation, linking/loading, and real-time execution on the target platform. Lopht fully automates the creation of tasks, partition, the full synthesis of C code compliant with the target API (e.g. C/APEX for ARINC 653 platforms), including communication code, and OS configuration for each computer), as well as the synthesis of communication schedules for the system
Two Lopht back-ends provide distinct input languages for platform description:
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One for distributed time-triggered architectures using ARINC 653-based processing nodes (SBCs) and Time-Triggered Ethernet networks
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One for many-core processors with support with timing predictability.
An ongoing research effort aims at providing a unified, formal platform description language allowing the unification of these back-ends.